Utilizing multiple microprocessors for multiple motor control processors controlling multiple motors is problematic in that coordination and communication between the motor control processors adds additional levels of complexity and utilizes additional resources and computation time, as well as requiring the establishment of some hierarchy mechanisms for the processors. Yet, utilizing a single motor control processor for multiple motor control presents difficulty in that each motor may use a different switching frequency.
While motor control circuits have been disclosed which use variable switching frequencies with a single motor controller to increase available execution time for additional low speed motor control algorithms or to reduce switching losses, a multiple motor system presents additional difficulties. For example, implementing a method to control two variable frequency motor drives within a single processor requires providing continuously variable switching frequencies for both controllers. Unwanted delays, however, may be introduced when the required sampling times overlap.
Accordingly, it is desirable to provide a method for utilization of a single motor control processor for controlling two or more motor controllers in a multiple motor system. In addition, it is desirable to provide a variable frequency control method for two motor controllers in one motor control processor which avoids unwanted delays in current sampling. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.